Struct zinc_hal_lpc11xx::ioregs::SYSCON_ssp0clkdiv

pub struct SYSCON_ssp0clkdiv {
    // some fields omitted
}

Register SSP0CLKDIV: SPI0 clock divider

Methods

impl SYSCON_ssp0clkdiv

fn get(&self) -> SYSCON_ssp0clkdiv_Get

Fetch the value of the SSP0CLKDIV register.

fn div(&self) -> u32

Get value of DIV field.

fn ignoring_state(&self) -> SYSCON_ssp0clkdiv_Update

Create new updater that ignores current value of the SSP0CLKDIV register.

fn set_div<'a>(&'a mut self, new_value: u32) -> SYSCON_ssp0clkdiv_Update<'a>

Set value of DIV field.

Trait Implementations

impl Copy for SYSCON_ssp0clkdiv

Derived Implementations

impl Clone for SYSCON_ssp0clkdiv

fn clone(&self) -> SYSCON_ssp0clkdiv

fn clone_from(&mut self, source: &Self)