Struct zinc_hal_lpc11xx::ioregs::SPI0_cr1_Get
[−]
[src]
pub struct SPI0_cr1_Get { // some fields omitted }
CR1
: Control Register 1. Selects master/slave and other modes.
Methods
impl SPI0_cr1_Get
fn new(reg: &SPI0_cr1) -> SPI0_cr1_Get
Create a getter reflecting the current value of the given register.
fn raw(&self) -> u32
Get the raw value of the register.
fn lbm(&self) -> SPI0_cr1_lbm
Get value of LBM
field: Loop Back Mode.
fn sse(&self) -> SPI0_cr1_sse
Get value of SSE
field: SPI Enable.
fn ms(&self) -> SPI0_cr1_ms
Get value of MS
field: Master/Slave Mode.This bit can only be written when the SSE bit is 0.
fn sod(&self) -> bool
Get value of SOD
field: Slave Output Disable. This bit is relevant only in slave mode (MS = 1). If it is 1, this blocks this SPI controller from driving the transmit data line (MISO).