Enum zinc_hal_lpc11xx::ioregs::SPI0_cr1_sse [−] [src]

pub enum SPI0_cr1_sse {
    Disabled,
    Enabled,
}

Variants

Disabled

The SPI controller is disabled.

Enabled

The SPI controller will interact with other devices on the serial bus. Software should write the appropriate control information to the other SPI/SSP registers and interrupt controller registers, before setting this bit.

Trait Implementations

Derived Implementations

impl PartialEq for SPI0_cr1_sse

fn eq(&self, __arg_0: &SPI0_cr1_sse) -> bool

fn ne(&self, __arg_0: &SPI0_cr1_sse) -> bool