Struct zinc_hal_lpc11xx::ioregs::SPI0_cr0
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[src]
pub struct SPI0_cr0 {
// some fields omitted
}Register CR0: Control Register 0. Selects the serial clock rate, bus type, and data size.
Methods
impl SPI0_cr0
fn get(&self) -> SPI0_cr0_Get
Fetch the value of the CR0 register.
fn dss(&self) -> SPI0_cr0_dss
Get value of DSS field.
fn frf(&self) -> SPI0_cr0_frf
Get value of FRF field.
fn cpol(&self) -> SPI0_cr0_cpol
Get value of CPOL field.
fn cpha(&self) -> SPI0_cr0_cpha
Get value of CPHA field.
fn scr(&self) -> u32
Get value of SCR field.
fn ignoring_state(&self) -> SPI0_cr0_Update
Create new updater that ignores current value of the CR0 register.
fn set_dss<'a>(&'a mut self, new_value: SPI0_cr0_dss) -> SPI0_cr0_Update<'a>
Set value of DSS field.
fn set_frf<'a>(&'a mut self, new_value: SPI0_cr0_frf) -> SPI0_cr0_Update<'a>
Set value of FRF field.
fn set_cpol<'a>(&'a mut self, new_value: SPI0_cr0_cpol) -> SPI0_cr0_Update<'a>
Set value of CPOL field.
fn set_cpha<'a>(&'a mut self, new_value: SPI0_cr0_cpha) -> SPI0_cr0_Update<'a>
Set value of CPHA field.
fn set_scr<'a>(&'a mut self, new_value: u32) -> SPI0_cr0_Update<'a>
Set value of SCR field.