Struct zinc_hal_lpc11xx::ioregs::CT32B0_ctcr
[−]
[src]
pub struct CT32B0_ctcr {
// some fields omitted
}Register CTCR: Count Control Register (CTCR). The CTCR selects between Timer and Counter mode, and in Counter mode selects the signal and edge(s) for counting.
Methods
impl CT32B0_ctcr
fn get(&self) -> CT32B0_ctcr_Get
Fetch the value of the CTCR register.
fn ctm(&self) -> CT32B0_ctcr_ctm
Get value of CTM field.
fn cis(&self) -> CT32B0_ctcr_cis
Get value of CIS field.
fn encc(&self) -> bool
Get value of ENCC field.
fn selcc(&self) -> CT32B0_ctcr_selcc
Get value of SELCC field.
fn ignoring_state(&self) -> CT32B0_ctcr_Update
Create new updater that ignores current value of the CTCR register.
fn set_ctm<'a>(&'a mut self, new_value: CT32B0_ctcr_ctm) -> CT32B0_ctcr_Update<'a>
Set value of CTM field.
fn set_cis<'a>(&'a mut self, new_value: CT32B0_ctcr_cis) -> CT32B0_ctcr_Update<'a>
Set value of CIS field.
fn set_encc<'a>(&'a mut self, new_value: bool) -> CT32B0_ctcr_Update<'a>
Set value of ENCC field.
fn set_selcc<'a>(&'a mut self, new_value: CT32B0_ctcr_selcc) -> CT32B0_ctcr_Update<'a>
Set value of SELCC field.