Struct zinc_hal_lpc11xx::ioregs::SYSCON_uartclkdiv_Get

pub struct SYSCON_uartclkdiv_Get {
    // some fields omitted
}

UARTCLKDIV: UART clock divder

Methods

impl SYSCON_uartclkdiv_Get

fn new(reg: &SYSCON_uartclkdiv) -> SYSCON_uartclkdiv_Get

Create a getter reflecting the current value of the given register.

fn raw(&self) -> u32

Get the raw value of the register.

fn div(&self) -> u32

Get value of DIV field: UART_PCLK clock divider values 0: Disable UART_PCLK. 1: Divide by 1. to 255: Divide by 255.

Trait Implementations

impl Copy for SYSCON_uartclkdiv_Get

Derived Implementations

impl Clone for SYSCON_uartclkdiv_Get

fn clone(&self) -> SYSCON_uartclkdiv_Get

fn clone_from(&mut self, source: &Self)