Struct zinc_hal_lpc11xx::ioregs::I2C [−] [src]

pub struct I2C;

I2C

Methods

`impl I2C`

`fn conset() -> &'static mut I2C_conset`

I2C Control Set Register. When a one is written to a bit of this register, the corresponding bit in the I2C control register is set. Writing a zero has no effect on the corresponding bit in the I2C control register.

`fn stat() -> &'static mut I2C_stat`

I2C Status Register. During I2C operation, this register provides detailed status codes that allow software to determine the next action needed.

`fn dat() -> &'static mut I2C_dat`

I2C Data Register. During master or slave transmit mode, data to be transmitted is written to this register. During master or slave receive mode, data that has been received may be read from this register.

`fn adr0() -> &'static mut I2C_adr0`

I2C Slave Address Register 0. Contains the 7-bit slave address for operation of the I2C interface in slave mode, and is not used in master mode. The least significant bit determines whether a slave responds to the General Call address.

`fn sclh() -> &'static mut I2C_sclh`

SCH Duty Cycle Register High Half Word. Determines the high time of the I2C clock.

`fn scll() -> &'static mut I2C_scll`

SCL Duty Cycle Register Low Half Word. Determines the low time of the I2C clock. I2nSCLL and I2nSCLH together determine the clock frequency generated by an I2C master and certain times used in slave mode.

`fn conclr() -> &'static mut I2C_conclr`

I2C Control Clear Register. When a one is written to a bit of this register, the corresponding bit in the I2C control register is cleared. Writing a zero has no effect on the corresponding bit in the I2C control register.

`fn mmctrl() -> &'static mut I2C_mmctrl`

Monitor mode control register.

`fn adr1() -> &'static mut I2C_adr1`

I2C Slave Address Register 1. Contains the 7-bit slave address for operation of the I2C interface in slave mode, and is not used in master mode. The least significant bit determines whether a slave responds to the General Call address.

`fn adr2() -> &'static mut I2C_adr2`

I2C Slave Address Register 1. Contains the 7-bit slave address for operation of the I2C interface in slave mode, and is not used in master mode. The least significant bit determines whether a slave responds to the General Call address.

`fn adr3() -> &'static mut I2C_adr3`

I2C Slave Address Register 1. Contains the 7-bit slave address for operation of the I2C interface in slave mode, and is not used in master mode. The least significant bit determines whether a slave responds to the General Call address.

`fn data_buffer() -> &'static mut I2C_data_buffer`

Data buffer register. The contents of the 8 MSBs of the I2DAT shift register will be transferred to the DATA_BUFFER automatically after every nine bits (8 bits of data plus ACK or NACK) has been received on the bus.

`fn mask0() -> &'static mut I2C_mask0`

I2C Slave address mask register 0. This mask register is associated with I2ADR0 to determine an address match. The mask register has no effect when comparing to the General Call address (0000000).

`fn mask1() -> &'static mut I2C_mask1`

I2C Slave address mask register 0. This mask register is associated with I2ADR0 to determine an address match. The mask register has no effect when comparing to the General Call address (0000000).

`fn mask2() -> &'static mut I2C_mask2`

I2C Slave address mask register 0. This mask register is associated with I2ADR0 to determine an address match. The mask register has no effect when comparing to the General Call address (0000000).

`fn mask3() -> &'static mut I2C_mask3`

I2C Slave address mask register 0. This mask register is associated with I2ADR0 to determine an address match. The mask register has no effect when comparing to the General Call address (0000000).