Struct zinc_hal_lpc11xx::ioregs::CT32B0_mr1_Get [−] [src]

pub struct CT32B0_mr1_Get {
    // some fields omitted
}

MR1: Match Register. MR can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR matches the TC.

Methods

`impl CT32B0_mr1_Get`

`fn new(reg: &CT32B0_mr1) -> CT32B0_mr1_Get`

Create a getter reflecting the current value of the given register.

`fn raw(&self) -> u32`

Get the raw value of the register.

`fn match_(&self) -> u32`

Get value of MATCH field: Timer counter match value.

Struct zinc_hal_lpc11xx::ioregs::CT32B0_mr1_Get [−] [src]

Methods

`impl CT32B0_mr1_Get`

`fn new(reg: &CT32B0_mr1) -> CT32B0_mr1_Get`

`fn raw(&self) -> u32`

`fn match_(&self) -> u32`

Trait Implementations

`impl Copy for CT32B0_mr1_Get`

Derived Implementations

`impl Clone for CT32B0_mr1_Get`

`fn clone(&self) -> CT32B0_mr1_Get`

`fn clone_from(&mut self, source: &Self)`