Struct zinc_hal_lpc11xx::ioregs::CT32B0_emr_Get [] [src]

pub struct CT32B0_emr_Get {
    // some fields omitted
}

EMR: External Match Register (EMR). The EMR controls the match function and the external match pins CT32B0_MAT[3:0].

Methods

impl CT32B0_emr_Get

fn new(reg: &CT32B0_emr) -> CT32B0_emr_Get

Create a getter reflecting the current value of the given register.

fn raw(&self) -> u32

Get the raw value of the register.

fn em0(&self) -> bool

Get value of EM0 field: External Match 0. This bit reflects the state of output CT32Bn_MAT0, whether or not this output is connected to its pin. When a match occurs between the TC and MR0, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of this output. This bit is driven to the CT32B0_MAT0/CT16B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH).

fn em1(&self) -> bool

Get value of EM1 field: External Match 1. This bit reflects the state of output CT32Bn_MAT1, whether or not this output is connected to its pin. When a match occurs between the TC and MR1, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of this output. This bit is driven to the CT32B0_MAT1/CT16B1_MAT1 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH).

fn em2(&self) -> bool

Get value of EM2 field: External Match 2. This bit reflects the state of output CT32Bn_MAT2, whether or not this output is connected to its pin. When a match occurs between the TC and MR2, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of this output. This bit is driven to the CT32B0_MAT2/CT16B1_MAT2 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH).

fn em3(&self) -> bool

Get value of EM3 field: External Match 3. This bit reflects the state of output CT32Bn_MAT3, whether or not this output is connected to its pin. When a match occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[11:10] control the functionality of this output. This bit is driven to the CT32B0_MAT3/CT16B1_MAT3 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH).

fn emc0(&self) -> CT32B0_emr_emc0

Get value of EMC0 field: External Match Control 0. Determines the functionality of External Match 0.

fn emc1(&self) -> CT32B0_emr_emc1

Get value of EMC1 field: External Match Control 1. Determines the functionality of External Match 1.

fn emc2(&self) -> CT32B0_emr_emc2

Get value of EMC2 field: External Match Control 2. Determines the functionality of External Match 2.

fn emc3(&self) -> CT32B0_emr_emc3

Get value of EMC3 field: External Match Control 3. Determines the functionality of External Match 3.

Trait Implementations

impl Copy for CT32B0_emr_Get

Derived Implementations

impl Clone for CT32B0_emr_Get

fn clone(&self) -> CT32B0_emr_Get

fn clone_from(&mut self, source: &Self)