Struct zinc_hal_lpc11xx::ioregs::CT16B0_mcr_Get [−] [src]

pub struct CT16B0_mcr_Get {
    // some fields omitted
}

MCR: Match Control Register (MCR). The MCR is used to control if an interrupt is generated and if the TC is reset when a Match occurs.

Methods

`impl CT16B0_mcr_Get`

`fn new(reg: &CT16B0_mcr) -> CT16B0_mcr_Get`

Create a getter reflecting the current value of the given register.

`fn raw(&self) -> u32`

Get the raw value of the register.

`fn mr0i(&self) -> CT16B0_mcr_mr0i`

Get value of MR0I field: Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC.

`fn mr0r(&self) -> CT16B0_mcr_mr0r`

Get value of MR0R field: Reset on MR0: the TC will be reset if MR0 matches it.

`fn mr0s(&self) -> CT16B0_mcr_mr0s`

Get value of MR0S field: Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches the TC.

`fn mr1i(&self) -> CT16B0_mcr_mr1i`

Get value of MR1I field: Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC.

`fn mr1r(&self) -> CT16B0_mcr_mr1r`

Get value of MR1R field: Reset on MR1: the TC will be reset if MR1 matches it.

`fn mr1s(&self) -> CT16B0_mcr_mr1s`

Get value of MR1S field: Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches the TC.

`fn mr2i(&self) -> CT16B0_mcr_mr2i`

Get value of MR2I field: Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC.

`fn mr2r(&self) -> CT16B0_mcr_mr2r`

Get value of MR2R field: Reset on MR2: the TC will be reset if MR2 matches it.

`fn mr2s(&self) -> CT16B0_mcr_mr2s`

Get value of MR2S field: Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches the TC.

`fn mr3i(&self) -> CT16B0_mcr_mr3i`

Get value of MR3I field: Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.

`fn mr3r(&self) -> CT16B0_mcr_mr3r`

Get value of MR3R field: Reset on MR3: the TC will be reset if MR3 matches it.

`fn mr3s(&self) -> CT16B0_mcr_mr3s`

Get value of MR3S field: Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches the TC.