Enum zinc_hal_lpc11xx::ioregs::C_CAN_cancntl_cce

pub enum C_CAN_cancntl_cce {
    NoAccess,
    WriteAccess,
}

Variants

NoAccess	The CPU has no write access to the bit timing register.
WriteAccess	The CPU has write access to the CANBT register while the INIT bit is one.

Trait Implementations

Derived Implementations

impl PartialEq for C_CAN_cancntl_cce

fn eq(&self, __arg_0: &C_CAN_cancntl_cce) -> bool

fn ne(&self, __arg_0: &C_CAN_cancntl_cce) -> bool