Enum zinc_hal_lpc11xx::ioregs::ADC_cr_burst [−] [src]

pub enum ADC_cr_burst {
    SoftwareControlled,
    HardwareScan,
}

Variants

SoftwareControlled

Software-controlled mode: Conversions are software-controlled and require 11 clocks.

HardwareScan

Hardware scan mode: The AD converter does repeated conversions at the rate selected by the CLKS field, scanning (if necessary) through the pins selected by 1s in the SEL field. The first conversion after the start corresponds to the least-significant bit set to 1 in the SEL field, then the next higher bits (pins) set to 1 are scanned if applicable. Repeated conversions can be terminated by clearing this bit, but the conversion in progress when this bit is cleared will be completed. Important: START bits must be 000 when BURST = 1 or conversions will not start.

Enum zinc_hal_lpc11xx::ioregs::ADC_cr_burst [−] [src]

Variants

Trait Implementations

Derived Implementations

`impl PartialEq for ADC_cr_burst`

`fn eq(&self, __arg_0: &ADC_cr_burst) -> bool`

`fn ne(&self, __arg_0: &ADC_cr_burst) -> bool`